Qualcomm to Bring RISC-V Based Wearable Platform to Wear OS by Google.
Important first milestone to bring RISC-V compatible CPUs to the Ecosystem
- Qualcomm and Google are extending their collaboration on wearables by developing a RISC-V Snapdragon Wear™ platform that will power next-generation Wear OS solutions.
- Work has begun and will continue to ensure that applications and a robust software ecosystem for RISC-V will be available for commercial launches.
- Qualcomm plans to commercialize the RISC-V based wearables solution globally, including the U.S.
San Diego, Oct 17, 2023 – Qualcomm Technologies, Inc. announced today that they are building on their long-standing collaboration with Google by bringing a RISC-V based wearables solution for use with Wear OS by Google. This expanded framework will pave the way for more products within the ecosystem to take advantage of custom CPUs that are low-power and high-performance. Leading up to this, the companies will continue to invest in Snapdragon Wear platforms as the leading smartwatch silicon provider for the Wear OS ecosystem.
“Qualcomm Technologies have been a pillar of the Wear OS ecosystem, providing high performance, low power systems for many of our OEM partners,” said Bjorn Kilburn, GM of Wear OS by Google. “We are excited to extend our work with Qualcomm Technologies and bring a RISC-V wearable solution to market.”
“We are excited to leverage RISC-V and expand our Snapdragon Wear platform as a leading silicon provider for Wear OS. Our Snapdragon Wear platform innovations will help the Wear OS ecosystem rapidly evolve and streamline new device launches globally,”said Dino Bekis, vice president and general manager, Wearables and Mixed Signal Solutions, Qualcomm Technologies, Inc.
Both companies recently joined other industry leaders to launch the RISC-V Software Ecosystem (RISE) and Qualcomm Technologies recently announced that it’s investing in a new company to advance RISC-V hardware development.
RISC-V Based Wearable Platform
As an open-source instruction set architecture (ISA), RISC-V encourages innovation by allowing any company to develop completely custom cores. This allows more companies to enter the marketplace, which creates increased innovation and competition. RISC-V’s openness, flexibility, and scalability benefit the entire value chain, from silicon vendors to OEMs, end devices, and consumers.
The timing of the commercial product launch of the RISC-V wearable-based solution will be disclosed at a later date.